Intel, AMD, and Cyrix have always used codenames when talking about future processors. The codenames usually are not supposed to become public, but they usually do. They can often be found in online and print news and magazine articles talking about future-generation processors. Sometimes, they even appear in motherboard manuals because the manuals are written before the processors are officially introduced. Table 3.17 lists processor codenames for reference purposes.
Table 3.17. Processor Codenames
AMD Codename | Description |
X5 | 5x86-133 [Socket 3] |
SSA5 | K5 (original PR75-PR100) [Socket 5, 7] |
5k86 | K5 (newer PR120-PR200) [Socket 7] |
K6 | Original AMD K6 core; canceled |
NX686 | NexGen K6 core; became the K6 [Socket 7] |
Little Foot | 0.25µm K6 [Socket 7] |
Chompers | K6-2 [Socket 7, Super 7] |
Sharptooth | K6-3 [Super 7] |
Argon | Formerly K7 |
K7 | Athlon [Slot A] |
K75 | 0.18µm Athlon [Slot A] |
K76 | 0.18µm Athlon (copper interconnects) [Slot A] |
K8 | Athlon 64 |
Thunderbird | Athlon [Slot A, Socket A] |
Mustang | Athlon w/large L2; canceled |
Corvette | Former mobile Athlon (now Palomino) |
Palomino | 0.18µm Athlon XP/MP, Mobile Athlon 4 [Socket A] |
Thoroughbred | 0.13µm Athlon XP/MP [Socket A] |
Barton | 0.13µm Athlon XP/MP w/512K L2 [Socket A] |
Spitfire | Duron [Socket A] |
Camaro | Former Morgan |
Morgan | Mobile Duron and Model 7 Duron[Socket A] |
Appaloosa | 0.13µm Morgan [Socket A] |
ClawHammer | Athlon 64 (64-bit CPU) [Socket 754] |
ClawHammer DP | Early name for Opteron DP [Socket 940] |
San Diego | 0.09µ Athlon 64 |
Odessa | 0.09µ mobile Athlon 64 |
SledgeHammer | Opteron w/large L2 [Socket 940] |
VIA/Cyrix Codename | Description |
M6 | 486DX [Socket 1, 2, 3] |
M7 | 486DX2/DX4 [Socket 3] |
M9 | 5x86 [Socket 3] |
M1sc | 5x86 [Socket 3] |
Chili | 5x86 project |
M1 | 6x86 (3.3V/3.52V) [Socket 7] |
M1L | 6x86L (2.8V) [Socket 7] |
M1R | 6x86 on IBM 5M process |
M2 | 6x86MX/M-II [Socket 7, Super 7] |
Cayenne | MXi and Gobi |
Jedi | Former Joshua (before Gobi) |
Gobi | Former Joshua |
Joshua | Former Cyrix III (canceled) |
MXi | Proprietary integrated CPU |
Jalapeno | Former Mojave |
Mojave | M3 [Socket 370] |
Serrano | M4 |
C5 | Samuel (Winchip-4) |
C5B | 0.15µm Samuel 2 |
C5C | 0.13µm Ezra |
C5M | Ezra-T |
C5N | Ezra-T (copper interconnects) |
Samuel | C3 [Socket 370] |
Samuel 2 | 0.15µm C3 [Socket 370] |
Ezra | 0.13µm C3 [Socket 370] |
Ezra-T | Ezra 1.25V [Socket 370] |
C5X | Nehemiah |
C5XL | Nehemiah (low power, small L2) |
C5YL | Esther |
Nehemiah | C3 [Socket 370] with encryption |
Esther | C4 [Socket 370] |
CZA | 0.10µm Socket 478 CPU |
Matthew | Proprietary integrated CPU |
Intel Codename | Description |
P23 | 486SX [Socket 1, 2, 3] |
P23S | 486SX SL-enhanced [Socket 1, 2, 3] |
P23N | 487SX (coprocessor) [Socket 1] |
P4 | 486DX [Socket 1, 2, 3] |
P4S | 486DX SL-enhanced [Socket 1, 2, 3] |
P24 | 486DX2 [Socket 1, 2, 3] |
P24S | 486DX2 SL-enhanced [Socket 1, 2, 3] |
P24D | 486DX2 (write-back cache) [Socket 3] |
P24C | 486DX4 [Socket 3] |
P23T | 486DXODP (486 OverDrive) [Socket 3] |
P4T | 486DXODPR (486 OverDrive) [Socket 1, 2, 3] |
P24T | PODP5V (Pentium OverDrive) [Socket 2, 3] |
P24CT | Pentium OverDrive 3.3V [Socket 2, 3] |
P5 | Pentium 60/66MHz [Socket 4] |
P5T | Pentium OverDrive 120/133MHz [Socket 4] |
P54C | Pentium 75MHz–120MHz [Socket 5, 7] |
P54CQS | Pentium 120MHz–133MHz [Socket 5, 7] |
P54CS | Pentium 120MHz–200MHz [Socket 7] |
P54CT(A) | Pentium OverDrive [Socket 5, 7] |
P55C | Pentium MMX [Socket 7] |
P54CTB | Pentium OverDrive MMX [Socket 5, 7] |
Tillamook | Mobile Pentium MMX [Mobile Module] |
P6 | Pentium Pro [Socket 8] |
P6T | Pentium II OverDrive [Socket 8] |
Klamath | 0.35µm Pentium II [Slot 1] |
Deschutes | 0.25µm Pentium II [Slot 1] |
Drake | 0.25µm Pentium II Xeon [Slot 2] |
Tonga | Mobile Pentium II |
Covington | Celeron (cacheless Pentium II) [Slot 1] |
Mendocino | 0.25µm Celeron w/128KB on-die L2 [Slot 1, Socket 370] |
Dixon | Mobile Pentium II w/256KB on-die L2 |
Katmai | 0.25µm Pentium III w/SSE [Slot 1] |
Tanner | 0.25µm Pentium III Xeon w/SSE [Slot 2] |
Coppermine | 0.18µm Pentium III w/on-die L2 [Slot 1, Socket 370] |
Tualatin | 0.13µm Pentium III [Socket 370] |
Coppermine-T | 0.18µm Pentium III w/Tualatin voltage [Socket 370] |
Cascades | 0.18µm Pentium III Xeon [Slot 2] |
Coppermine-128 | 0.18µm Celeron w/128KB L2 [Socket 370] |
Timna | Mobile Celeron w/DRAM controller; canceled |
P68 | Willamette |
Willamette | 0.18µm Pentium 4 [Socket 423, 478] |
Northwood | 0.13µm Pentium 4 [Socket 478] |
Prescott | 0.09µm Pentium 4 w/Hyperthreading [Socket 478] |
Banias | Mobile Pentium 4 |
Foster | Xeon DP [Socket 603] |
Foster MP | Xeon MP [Socket 603] |
Prestonia | 0.13µm Xeon DP [Socket 603] |
Gallatin | 0.13µm Xeon MP [Socket 603] |
Nocona | 0.09µm Xeon [Socket 603] |
Banias | Mobile Pentium 4 w/DRAM controller |
P7 | Former Merced (Itanium) |
Merced | Itanium [PAC 418] |
McKinley | Itanium 2 w/3MB on-die L3 [PAC 418] |
Madison | 0.13µm Itanium 2 |
Deerfield | Low-cost Madison |
Montecito | 0.09µm Madison |
Shavano | Future Itanium family chip |
Note that the codenames and information listed in these tables are used before the processor is officially introduced. After a chip is introduced, the codename is dropped and the chip is thereafter referred to by the marketing name used at the time of the introduction. Because many of these names refer to chips that are not yet officially released, the names or specifications might change. For chipset codenames, see Chapter 4.
